The present invention relates to a key scan circuit and the method adapted in a microcomputer system utilizing a bilateral port, and more particularly to a key scan circuit and the method thereof which requires no diode for preventing a circuit short during a key scan operation, and performs key check and automatic system operations with a simplified circuit structure.
In a conventional key scan circuit as disclosed in the same applicant's Korean Patent Publication No. 89-2297, signals sensed in a key matrix circuit 3 are fed to data input ports D0-D2 of a microprocessor 1 through a multiplexer 4 as shown in FIG. 1. In FIG. 1, output ports P0, P1, P2 and P3 of microprocessor 1 are respectively coupled to input terminals a, b, c and d of demultiplexer 2, then falling pulses from output terminals O-F of demultiplexer 2 are sequentially supplied to each row scan lines Y0-Y15 of matrix circuit 3. Thereafter, the data of column scan lines X0-X7 of the matrix circuit 3 are inputted to input terminals 0-7 of multiplexer 4 of which the outputs Q0-Q2 are input to the data input ports D0-D2 of microprocessor 1 to scan the keyboard. Accordingly, the conventional key scan circuit checks keys by directly driving ports, requiring additional circuitry such as a demultiplexer and a data buffer, plus requires an additional circuit composed of diodes to guard against shorts at the ports when two or more keys are simultaneously pressed.